About Us Technology Products & Solutions News & Events Contact Us
Français
 
Accueil / Produits & Solutions / Circuit intégré PLM-1 /
products
Solutions
Configuration
Sommaires des Fonctionnalités
Transceiver Introduction
Transceiver Coding
Transceiver Protocol
Transceiver System Architecture
Transceiver Host
Transceiver Interoperability
Produits
Services d'ingénierie

PLM-1 Transceiver: Coding (anglais seulement)

Abstract: Reliable PLC technologies implement a good forward error correction (FEC) technique. The PLM-1 technology is one of those.

Power line environments are harsh and noisy. The noise, according to independent studies, has two distinct simultaneous modes: constant, low-level, wideband noise, punctuated by high-level noise impulses. The first of the two noise modes is easily overcome: typical PLC signals have greater amplitude than the background noise and the required signal-to-noise ratio is thus easily achieved. Not so with impulse noise, easily 100 times stronger than background noise. Moreover, the impulse noise pattern is usually cyclic, repeating at twice the line frequency, i.e., 120 times per second on a 60 Hz power line.

It is a given that lengthy lines as well as loads connected to those lines attenuate PLC signals (by typically 20 dB or more). Impulse noise sources, close to a receiver, can exceed the noise tolerance (minimum signal-to-noise ratio) of that receiver and change the value of an incoming bit, up to 120 times per second! Repeating packets longer than 1/120 s will not overcome the problem: none of these packets will come through. All existing PLC technologies come across this problem and there is only one known solution, called "Forward Error Correction" (FEC). This technique is widely used, e.g., in CD technology to provide a margin of tolerance for scratched disks. FEC adds redundant data to the outgoing signal so that the receiver can retrieve the original data from the incoming signal, even if a certain number of bits-including the redundant bits-are altered. IMPORTANT-Please note that CRC only detects errors, while FEC actually corrects them.

Considering the cyclic nature of impulse noise, a properly applied FEC technique typically improves the noise tolerance of a given receiver by a factor of 30. Moreover, the FEC technique is easily implemented on a transceiver chip, requiring only a few hundred logic gates. The cost of FEC is probably less than 1/10 cent per transceiver! Furthermore, in several situations, FEC actually improves throughput! PLM-1 implements a high-efficiency FEC technique. It can correct up to two erroneous bits per data byte.